|
|
|
Product Overview: |
|
|
|
NOTE: Not recommended for new designs (replacement by SH7750R) The SH7750S is a 32-bit RISC (reduced instruction set computer) microprocessor, featuring object code upward-compatibility with SH-1, SH-2, and SH-3 microcomputers. It includes an instruction cache, an operand cache with a choice of copy-back or write-through mode, and an MMU (memory management unit) with a 64-entry fully-associative unified TLB (translation lookaside buffer). The SH7750S has an 8-kbyte instruction cache and a 16-kbyte data cache.
The SH7750S has an on-chip bus state controller (BSC) that allows connection
to DRAM and synchronous DRAM. Its 16-bit fixed-length instruction set enables
program code size to be reduced by almost 50% compared with 32-bit
instructions. |
|
|
|
Key Features: |
|
|
|
|
|
|
Key Applications: |
|
|
|
Car Navigations, Digital TVs, STBs, Image processing, Printers, MFPs |
|
|
Product Lineup: |