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RZ/T1

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Realize Real-Time Control of Industrial Equipment and Networking at the Same Time

The RZ/T1 Group has the ARM® Cortex®-R4F core, which was designed for real-time processing, and is capable of high-speed operation at up to 600 MHz. Furthermore, access does not need to be performed via cache memory, and tightly-coupled memory capable of definitive real-time response processing is built-in, enabling high-speed access from the CPU without passing through the cache memory.


RZ/T1 devices that are equipped with a built-in R-IN engine, an accelerator for industrial Ethernet communications, can perform industrial Ethernet processing without loss of real-time performance.

Features

■  High-speed real-time control
600 MHz Cortex®-R4F core
Tightly-coupled RAM*: 512 KB + 32 KB (with ECC)
eliminates deviation in execution time due to cache
1 MB internal RAM (option)

*: High-speed built-in memory that allows direct access from the processor core to the memory interface without passing through cache memory

■  Support for industrial applications
Multi-protocol industrial Ethernet ( Built-in R-IN engine )(option)
- Supprot protocol:EtherCAT®,EtherNet/IP™,PROFINET etc.

■  Abundant peripheral functions
Inherits SH and RX microcontroller peripheral functions (possible to shorten development time)
Encoder interfaces (EnDat2.2 and BiSS®)
Serial flash memory reduces external ROM mounting area
Support for external SDRAM
Two channels of CAN, two channels of IIC, one channel of USB 2.0 (high-speed) host/peripheral, 100 Mbps EtherMAC

■  ARM Ecosystem
Renesas participates in APS (ARM PARTNERS SUCCESS) ECOSYSTEM PARTNERS, which aims to provide optimal solutions to customers and encourage activities in the ARM ecosystem.

RZ/T1 Block Diagram

RZ/T1 (without R-IN engine)

Specifications

RZ/T1 (without R-IN engine)

Part number R7S910001

R7S910002
R7S910011
R7S910006

R7S910007
R7S910013
R7S910025
R7S910026
R7S910027
R7S910028
Packages

176HLQFP
0.4mm pitch
20mm x 20mm

320FPBGA
0.8mm pitch
17mm x 17mm
Main CPU
ARM®Cortex®-R4F
Maximum operating frequency
450MHz 600MHz 450MHz 600MHz
FPU
Supports single-precision and double-precision addition, subtraction, multiplication, division, multiply-accumulation, and square root calculation
Tightly-coupled memory
ATCM: 512 KB (with ECC); BTCM: 32 KB (with ECC)
Cache memory
Instruction cache: 8 KB (with ECC); data cache: 8 KB (with ECC)
Expanded internal SRAM
- - 1MB (with ECC) 1MB(with ECC)
Clocks
  • External clock/resonator input frequency: 25 MHz
  • CPU clock frequency: up to 450/600 MHz
  • Low-speed on-chip oscillator (LOCO): 240 kHz
Timers
    Up to 33 expanded timer functions
  • 16-bit TPUa (12 channels), MTU3a (9 channels), GPTa (4 channels): input capture, output compare, PWM waveform output
  • 16-bit CMT (6 channels), 32-bit CMTW (2 channels)
  • *176-pin packages differ in number of channels, etc.
Communications
  • EtherMAC: 1 port (with switching)
  • USB 2.0 high-speed host/function: 1 channel
  • CAN (ISO 11898-1 compliant): up to 2 channels
  • 16-byte SCIFA with FIFO: 5 channels
  • I2C bus interface: 2 channels of up to 400 kbps transfer speed
  • RSPIa: 4 channels
  • SPIBSC: 1 channel of multi-I/O serial flash memory connectable
  • *176-pin packages differ in number of channels, ports, etc.
Memory interfaces
  • SPI 4ch
  • QSPI(Flash I/F) with Direct Access from CPU
  • SRAM I/F(32bit bus)
  • SDRAM I/F(32bit bus)
  • Burst ROM I/F(32bit bus)
EtherCAT
Slave Controller
- support
Encoder
interfaces
- EnDat2.2 and BiSS interfaces (R7S910011) - EnDat2.2 and BiSS interfaces (R7S910013) EnDat2.2 and BiSS interfaces (R7S910026) EnDat2.2 and BiSS interfaces (R7S910028)
A/D converter
12-bit A/D converter: 2 units (unit 0: 8 channels; unit 1: 16 channels)
*176-pin packages only have unit 0.
DMA 16 channels x 2 units
Other functions
  • Built-in temperature sensor for measuring internal chip temperature
  • Safety features (register write protection, input clock oscillation stop detection, CRC, IWDTa, A/D self-diagnostics, error control module, etc.)
  • Security functions (option): Secure boot, JTAG lock, etc.
Power supply voltage Operating
3.3 V (I/O), 1.2 V (internal)
temperature range
Tj = -40 to +125°C

 

RZ/T1 Block Diagram

RZ/T1 (with R-IN engine)

Specifications

RZ/T1 (with R-IN engine)

Part number R7S910015 R7S910016 R7S910017 R7S910018
Packages
320FPBGA
0.8mm pitch
17mm x 17mm
Main CPU
ARM®Cortex®-R4F
Maximum operating frequency
450MHz 600MHz
FPU
Supports single-precision and double-precision addition, subtraction, multiplication, division, multiply-accumulation, and square root calculation
Tightly-coupled memory
ATCM: 512 KB (with ECC); BTCM: 32 KB (with ECC)
Cache memory
Instruction cache: 8 KB (with ECC); data cache: 8 KB (with ECC)
Communication accelerator
R-IN engine multi-protocol communication accelerator
Expanded internal SRAM
1 MB (with ECC) *also used for storing protocol stack
Clocks
  • External clock/resonator input frequency: 25 MHz
  • CPU clock frequency: up to 450/600 MHz
  • Low-speed on-chip oscillator (LOCO): 240 kHz
Timers
    Up to 33 expanded timer functions
  • 16-bit TPUa (12 channels), MTU3a (9 channels), GPTa (4 channels): input capture, output compare, PWM waveform output
  • 16-bit CMT (6 channels), 32-bit CMTW (2 channels)
  • *176-pin packages differ in number of channels, etc.
Communications
  • EtherMAC: 1 port (with switching)
  • EtherCAT slave controller
  • USB 2.0 high-speed host/function: 1 channel
  • CAN (ISO 11898-1 compliant): up to 2 channels
  • 16-byte SCIFA with FIFO: 5 channels
  • I2C bus interface: 2 channels of up to 400 kbps transfer speed
  • RSPIa: 4 channels
  • SPIBSC: 1 channel of multi-I/O serial flash memory connectable
Memory interfaces
  • SPI 4ch
  • QSPI(Flash I/F) with Direct Access from CPU
  • SRAM I/F(32bit bus)
  • SDRAM I/F(32bit bus)
  • Burst ROM I/F(32bit bus)
Encoder
interfaces
- EnDat2.2 and BiSS
interfaces
- EnDat2.2 and BiSS
interfaces
A/D converter
12-bit A/D converter: 2 units (unit 0: 8 channels; unit 1: 16 channels)
DMA 16 channels x 2 units
Other functions
  • Built-in temperature sensor for measuring internal chip temperature
  • Safety features (register write protection, input clock oscillation stop detection, CRC, IWDTa, A/D self-diagnostics, error control module, etc.)
  • Security functions (option): Secure boot, JTAG lock, etc.
Power supply voltage
3.3 V (I/O), 1.2 V (internal)
Operating temperature range
Tj = -40℃ ~ +125℃
  • *ARM and Cortex are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere.
    All rights reserved.
  • *EtherCAT is a patented technology that Renesas has licensed from Beckhoff Automation GmbH, and is a registered trademark.
  • *EtherNet/IP is a trademark of ODVA.
  • *BiSS is a registered trademark of iC-Haus.
  • *CAN(Controller Area Network):An automotive network specification developed by Robert Bosch GmbH of Germany.
  • *All other names of products or services mentioned here are trademarks or registered trademarks of their respective owners.

 

Packages

 

RZ/T1

176p QFP
0.4mm pitch
20mmx20mm

320p BGA
0.8mm pitch
17mmx17mm

Package information

Package information

 

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