RX CPU core: High-speed, high-performance, and high-code-efficiency High speed: 100MHz; high performance: 165DMIPS@100MHz (1.65DMIPS/MHz) Built-in multiply-divide unit, multiply-and-accumulate unit, and single-precision floating point unit (FPU) The RX CPU has achieved a maximum operating frequency up to 200MHz. It is the next-generation CPU core that adopted high-speed features such as 5-stage pipeline, Harvard architecture, out-of-order execution, as well as multiply and accumulate unit, and FPU. With the RX610 Group, high processing performance of 1.65DMIPS at 1MHz (165DMIPS at 100MHz) has been achieved. Low power consumption Output current is about 50mA, even at the fastest-speed operation at 100MHz. This translates to 0.5mA per 1MHz, about half that of Renesas’ existing products. In addition, by optimizing the instruction length of frequently used instructions, an average 30% improvement in code efficiency over existing products is achieved. Equipped with large-volume high-speed memory The maximum memory capacity is 2MB flash ROM with a 128KB RAM. The 2MB flash ROM is of high-speed MONOS (Metal Oxide Nitride Oxide Silicon) structure, no wait states at speeds up to 100MHz. Combined with more than 30% improvement in code efficiency compared to Renesas’ existing products, it is highly useful for large-scale applications that require high-speed processing. In addition, a 128KB SRAM and a data flash with 30,000 erase/write cycles are mounted to eliminate the need for external SRAM or EEPROM. Enhanced built-in functions In addition to enhanced standard functions such as serial communications and timer, the new products incorporate a variety of popular functions used in existing Renesas products, including DMAC (Direct Memory Access Controller) to perform high-speed data transfer in place of the CPU, DTC (Data Transfer Controller) to make data transfer efficient, and CMT (Compare Match Timer) useful for interrupt and polling. |